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PD - 95219
IRL2203NSPbF IRL2203NLPBF
l l l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated 100% RG Tested Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = 30V RDS(on) = 7.0m
G S
ID = 116A
Description
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL2203NL) is available for low-profile applications.
D2Pak IRL2203NS
TO-262 IRL2203NL
Absolute Maximum Ratings
Symbol Parameter Max
116 82 400 3.8 180 1.2 16 60 18 5.0 -55 to + 175 300 (1.6mm from case) A W W W/C V A mJ V/ns C
Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM PD @TA = 25C Power Dissipation PD @TC = 25C Power Dissipation VGS IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Thermal Resistance
Symbol
RJC RJA Junction-to-Case
Parameter
Typ
--- ---
Max
0.85 40
Units
C/W
Junction-to-Ambient (PCB mount, steady state)
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1
04/27/04
IRL2203NS/LPbF
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd RG td(on) tr td(off) tf LD LS Ciss Coss Crss EAS
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy
Min
30 --- --- --- 1.0 73 --- --- --- --- --- --- --- 0.2 --- --- --- --- --- --- --- --- ---
Typ
--- 0.029 --- --- --- --- --- --- --- --- --- --- --- --- 11 160 23 66 4.5 7.5 3290 1270
Max Units
--- --- 7.0 10 3.0 --- 25 250 100 -100 60 14 33 3.0 --- --- --- --- --- Nh --- --- --- pF mJ VDD = 15V ID = 60A RG = 1.8 nC V S A nA V
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 60A VGS = 4.5V, ID = 48A VDS = VGS, ID = 250A VDS = 25V, ID = 60A VDS = 30V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125C VGS = 16V VGS = -16V ID = 60A VDS = 24V VGS = 4.5V, See Fig. 6 and 13
V/C Reference to 25C, ID = 1mA
VGS = 4.5V, See Fig. 10 Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 IAS = 60A, L = 0.16mH
170 --- --- 1320 290
Source-Drain Ratings and Characteristics
Symbol
IS ISM VSD trr Qrr ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min
--- --- --- --- ---
Typ
--- --- --- 56 110
Max Units
116 400 1.2 84 170 V ns nC A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 60A, VGS = 0V TJ = 25C, IF = 60A di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 0.16mH RG = 25, IAS = 60A, VGS=10V (See Figure 12) ISD 60A, di/dt 110A/s, VDD V(BR)DSS, TJ 175C Pulse width 400s; duty cycle 2%.
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175C . Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application note #AN-994. R is measured at TJ approximately 90C
2
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IRL2203NS/LPbF
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
1000
100
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
2.7V
10
10
2.7V
1 0.1
20s PULSE WIDTH T = 25 C
J 1 10 100
1 0.1
20s PULSE WIDTH T = 175 C
J 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
ID = 100A
TJ = 25 C TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
2.0
1.5
100
1.0
0.5
10 2.0
V DS = 15V 20s PULSE WIDTH 5.0 6.0 3.0 4.0 7.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL2203NS/LPbF
6000
VGS , Gate-to-Source Voltage (V)
5000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = 60A
12
VDS = 24V VDS = 15V
C, Capacitance (pF)
4000
Ciss
3000
9
2000
C oss
6
1000
3
C rss
0 1 10 100 0 0 20
FOR TEST CIRCUIT SEE FIGURE 13
60 40 80
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
TJ = 175 C
ID , Drain-to-Source Current (A)
1000
10
100
100sec 1msec
1
TJ = 25 C
10 Tc = 25C Tj = 175C Single Pulse 1 10 VDS , Drain-toSource Voltage (V) 10msec
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0 2.4
1
VSD ,Source-to-Drain Voltage (V)
100
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL2203NS/LPbF
120
LIMITED BY PACKAGE
100
VDS VGS RG
RD
D.U.T.
+
I D , Drain Current (A)
80
-VDD
VGS
60
Pulse Width 1 s Duty Factor 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20 0.10 0.05 0.02 0.01
0.1
SINGLE PULSE (THERMAL RESPONSE)
0.01 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.0001 0.001
P DM t1 t2 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL2203NS/LPbF
600
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
500
VD S
L
D R IV E R
TOP BOTTOM ID 24A 42A 60A
400
RG
VGS 20V
D .U .T IA S tp 0 .0 1
+ - VD D
A
300
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
200
100
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VGS
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL2203NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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IRL2203NS/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H I S IS AN IR F 53 0 S WIT H L OT COD E 8 02 4 AS S E MB L E D ON WW 0 2 , 2 00 0 IN T H E AS S E MB L Y L IN E "L " N ote: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R N AT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 53 0S D AT E COD E YE AR 0 = 200 0 WE E K 02 L IN E L
OR
INT E R NAT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 53 0S DAT E COD E P = DE S IGNAT E S L E AD -F R E E P R ODU CT (OP T IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E COD E
8
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IRL2203NS/LPbF
TO-262 Package Outline
TO-262 Part Marking Information
E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
OR
INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE
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9
IRL2203NS/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 )
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 )
F E E D D IR E C T IO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 )
1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TRL
1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 )
F E E D D IR E C T IO N
1 3 .5 0 (.5 3 2 ) 1 2 .8 0 (.5 0 4 )
2 7 .4 0 (1 .0 7 9 ) 2 3 .9 0 (.9 4 1 ) 4
330.00 (1 4.17 3) M AX.
6 0 .0 0 (2 .3 6 2) M IN .
NOTES : 1 . C O M F O R M S T O E IA -4 1 8 . 2 . C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E .
26 .40 (1.03 9) 24 .40 (.961 ) 3
3 0 .4 0 (1 .1 9 7 ) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04
10
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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